The present invention relates to a high-breakdown-voltage semiconductor device.
In general, a high-breakdown-voltage semiconductor device used in a high voltage driving circuit or the like and a low-breakdown-voltage semiconductor device used in a low voltage driving circuit or the like are formed on the same substrate, constituting a power IC. Such a kind of power IC is known widely and used in various applications. Generally, at the output stage of the power IC, a high-breakdown-voltage MOSFET is used as a high-breakdown-voltage semiconductor device. The high-breakdown-voltage MOSFET requires a low ON-resistance.
FIG. 1 is a cross-sectional view of an element structure of the high-breakdown-voltage MOSFET. In the high-breakdown-voltage MOSFET, a p-type body layer 2 is selectively formed on a surface of a p-type semiconductor substrate 1 having a high resistance. An n-type source layer 3 is selectively formed in a surface of the p-type body layer 2.
An n-type offset layer 4 having a high resistance is formed in that region of the surface of the p-type semiconductor substrate 1 which differs from the region of the surface thereof in which the p-type body layer 2 is formed. A gate electrode 8 is formed on that region of the p-type body 2 which is located between the n-type source layer 3 and the n-type offset layer 4, and that region of the offset layer 4 which is adjacent to the above region of the p-type body 2, with a gate insulating film 6 and a field oxide film 7 interposed between the gate electrode 8 and the above regions of the p-type body 2 and offset layer 4.
In the high-breakdown-voltage MOSFET, an n-type drain layer 5 is formed in a surface of an offset layer 4, and thus the offset layer 4 serves as a so-called resurf (reduced surface field) layer. The resurf layer can keep the breakdown voltage of the semiconductor device at a high value, and at the same time, restrict the ON-resistance to a low value. FIG. 2 shows drain voltage/drain current characteristic curves in relation to gate voltages V.sub.G of 0V (OFF state) to 5V with respect to the high-breakdown-voltage MOSFET.
As seen from FIG. 2, the high-breakdown-voltage MOSFET having the above structure can achieve a high breakdown voltage when the gate voltage V.sub.G is low, i.e., it is about 1V or less, and the gate is in the OFF state. However, it cannot achieve a high breakdown voltage when the gate voltage V.sub.G is more than 1V, and the gate is in the ON state.
To be more specific, in the above high-breakdown-voltage MOSFET, equipotential lines are present at a high density on the drain side in the surface of the n-type offset layer 4, and an electric field in that end portion of the n-type drain layer 5 which is opposite to the source layer 3 has a high intensity, due to a drain current flowing through the element when the gate is in the ON state. In other words, part of the positive space charge of the n-type offset layer 4 is neutralized by the charge of electrons moving through the n-type offset layer 4. Consequently, the n-type layer 4 does not act as the resurf layer, lowering the breakdown voltage. This problem becomes more remarkable when the gate voltage V.sub.G is 3V or more which is 1/2 or more of the rated gate voltage.
In such a manner, the breakdown voltage of the above high-breakdown-voltage MOSFET is low when the gate is in the ON state. Thus, the high-breakdown-voltage MOSFET cannot be used in an analog circuit in which the drain is directly connected to a power source, and the gate is biased.
When a drain current I.sub.D per 1 cm of a channel width is I.sub.D, the amount of charge of electrons is q (=1.6.times.10.sup.-19 C: coulomb), and the drift speed of electrons is .upsilon..sub.drift (=8.times.10.sup.6 cm/s), the negative charge of the n-type offset layer 4 is I.sub.D /(q.multidot..upsilon..sub.drift)cm.sup.-2. In addition, the gate width is a length of the gate which is measured in a direction perpendicular to the-cross-section of the element structure of the conventional high-breakdown-voltage MOSFET which is shown in FIG. 1. Hereinafter, it is referred to as a channel width.